Model: Asus U30JC plate number: U30Jc : HM55 chipset O - ^: - P7 V V * M & h 'h! Before reset: single significant power generation timing
Model: THINAPAD E430
Plate number: LA-8131P "c3 g # # Z6 d; Z N. C8 O?
chipset, HM7X '^ 4 Y6] * v2 [([5 O
power before independence was reset generation
/ S & W1 F0 I f0 q; q, j & achipset, HM7X '^ 4 Y6] * v2 [([5 O
power before independence was reset generation
Models: Lenovo Z360 M2 M2 J7 `8 B6 E4 N $ b
plate number: Quanta LL7A 'L) `+ S2 X7 z & m6 \
Chipset: HM55 .. O, K2 m H ^ - b7 W (J
alone significantly After resetting power supply platform set was powered: the CPU power supply before
plate number: Quanta LL7A 'L) `+ S2 X7 z & m6 \
Chipset: HM55 .. O, K2 m H ^ - b7 W (J
alone significantly After resetting power supply platform set was powered: the CPU power supply before
Model: G360 G5} 5 R3 N & K, S `
plate number: DALL7AMB6E0 Chipset: HM55 Graphics: N11M-GE2-S-B1 (_ "p9 $ E7 O1 D D2 L integrated graphics power: before CPU Reset /} ? * $ D) | 1} 0 y I1 h [8 d * p.! discrete graphics powered: CPU reset after 5 w (V (t "Z1 [2 a2 d This machine is not plugged in memory there Brownout reasons it is not reset
plate number: DALL7AMB6E0 Chipset: HM55 Graphics: N11M-GE2-S-B1 (_ "p9 $ E7 O1 D D2 L integrated graphics power: before CPU Reset /} ? * $ D) | 1} 0 y I1 h [8 d * p.! discrete graphics powered: CPU reset after 5 w (V (t "Z1 [2 a2 d This machine is not plugged in memory there Brownout reasons it is not reset
Models: Lenovo Z360 - [, J3 d, k * H3 a; y% E8 I; g + {
plate number: LL7 Chipset: HM55 s (N, y; K & Z. J I. set of significant power generation timing: Reset before . $ z4 R s $} (P- U% s v1 t5 j After reset: single significant power generation timing
plate number: LL7 Chipset: HM55 s (N, y; K & Z. J I. set of significant power generation timing: Reset before . $ z4 R s $} (P- U% s v1 t5 j After reset: single significant power generation timing
Models: HP G4 W) [K X0 Z + w / \ / G7 mn / c8 M # X1 w!
plate number: R13 (DAOR13MB6EO) Chipset: HM65 % 0 A YG / y: G5 X; G, v set was After the reset voltage
-. Y9 `4 g, u aplate number: R13 (DAOR13MB6EO) Chipset: HM65 % 0 A YG / y: G5 X; G, v set was After the reset voltage
Machine: Acer E1-471G 'd & T5 d: Y9 c & w A!
Version Number: ZQSA Chipset: HM77 integrated graphics and discrete graphics are reset after the CPU! 2 s) A! T1 z (_ "@) e this machine I took, for three days, current 0.5A, do not run it, integrated and discrete graphics power did not come out, CPU reset has been OK! Also this machine standby EC BIOS no waveform, after power, display, and press the switch off, when the BIOS only waveforms are front display, and the display contrast results! Of course, the final check of the pull-down resistor bridge corrosion, to fix it, R527 750 Ohm!
Version Number: ZQSA Chipset: HM77 integrated graphics and discrete graphics are reset after the CPU! 2 s) A! T1 z (_ "@) e this machine I took, for three days, current 0.5A, do not run it, integrated and discrete graphics power did not come out, CPU reset has been OK! Also this machine standby EC BIOS no waveform, after power, display, and press the switch off, when the BIOS only waveforms are front display, and the display contrast results! Of course, the final check of the pull-down resistor bridge corrosion, to fix it, R527 750 Ohm!
Models: Acer V3-471G 4 h4 K9 B9 e0 s "k
board number: DAOZQSMB *} x + B & w # P
Chipset: HM77 ; v2 `:? P1% Z4 C t8 V
power supply alone was: after a reset
) G: b * o # a ^ 6 yboard number: DAOZQSMB *} x + B & w # P
Chipset: HM77 ; v2 `:? P1% Z4 C t8 V
power supply alone was: after a reset
Lenovo Y470 ?% 9 V1 T7 [4 F0 m + J5 b2 y
plate number, LA-6884P 2 C # x1 G1 I0 X3 T $ D / N
chipset .HM67 ? 9 U) ~) O 'G6 M0) V: \ 3 J; w
single significant power generation timing: After a reset / K + f 'F) o) O2 {: Z3 Z X!
After running code: set display power generation timing
3 j: W (4 Z + q $ j7 T?plate number, LA-6884P 2 C # x1 G1 I0 X3 T $ D / N
chipset .HM67 ? 9 U) ~) O 'G6 M0) V: \ 3 J; w
single significant power generation timing: After a reset / K + f 'F) o) O2 {: Z3 Z X!
After running code: set display power generation timing
Models: Lenovo U460 ; \ 8 F f + ~ & \ (~; v2 M
board number: LA-5941p Rev: 1.0 . 4 O G9 D? 'KK) S0 x'
Chipset: HM55 ; r (b "Y8 O & d3 `
single significant power generation timing: Before resetting '
$] 2 [, z [! W0 ^! T l5 \ + K) @board number: LA-5941p Rev: 1.0 . 4 O G9 D? 'KK) S0 x'
Chipset: HM55 ; r (b "Y8 O & d3 `
single significant power generation timing: Before resetting '
Model: Asus N73SV 1 u z; V; T2 R% w (y L; H.!
plate number: N73SV 2.0 Chipset: HM65 * L5 b: b) \ d / A9 J; f7 N0 L alone was generating power Timing: After a reset ?.! * \ ~ # I9 S _ + [) i% {+ A set of significant power generation timing: After running code
;? _, 4 k4 w * R; Jplate number: N73SV 2.0 Chipset: HM65 * L5 b: b) \ d / A9 J; f7 N0 L alone was generating power Timing: After a reset ?.! * \ ~ # I9 S _ + [) i% {+ A set of significant power generation timing: After running code
Model: Z370 ) @ 2 U * G) O / w $ m & P 'B
plate number: kl5 8 T s $ J1 P ~ # Q% Z!
Chipset: HM65 CPU reset after: Integrated graphics power graphics card power supply : CPU before reset
& N2 _3 Z 'Z x * p2 x & `6 Jplate number: kl5 8 T s $ J1 P ~ # Q% Z!
Chipset: HM65 CPU reset after: Integrated graphics power graphics card power supply : CPU before reset
Machine: B460 * F & J (S. B7 C
plate number: BITLAND_BM5958 ?? 0 J8 Q1 R. E + y & X (e, x "N # u
Chipset: HM55 set of significant voltage: up to enter the system, the amount of the voltage has been is 0V voltage alone was: CPU before reset
# A / X. R4 O4 q (o + zplate number: BITLAND_BM5958 ?? 0 J8 Q1 R. E + y & X (e, x "N # u
Chipset: HM55 set of significant voltage: up to enter the system, the amount of the voltage has been is 0V voltage alone was: CPU before reset
DELL XPS L701X la-7852 that independence was set was closed voltage voltage
- M2 y & b "P" g + ~ 0 t0 j
Model: ACER 4745G plate number: ZQ1 5] 3 b ~) U, i $ e2 u & @ / v * T. Chipset: HM55 * _ $ u + `* Q1 y3 b * a set of significant supply: Before reset (actual Measure the voltage value comparison, only 0.6-0.8V, CPU is I5 430M) independent power supply: After a reset, precisely, should be too after memory test, do not plug the memory, not the independent voltage (actual measurement 0.8-1.05v)
2 N3 V6 i '`0 z% M- @ - M
Machine: Lenovo B470 plate number: LA470 10250 7 B # X2 v9 F. g s & _) i% \ (U7 r $ q!
Chipset: HM65 - Q3 t '} 8 S1 {* V
single significant voltage: cpu reset before * a8 P0}) G: L0 u
after CPU reset: Set voltmeter
+ `# Z6 p + Y3 x7 f8 pChipset: HM65 - Q3 t '} 8 S1 {* V
single significant voltage: cpu reset before * a8 P0}) G: L0 u
after CPU reset: Set voltmeter
: Machine Model ASUS K42JA ; L "C7 G0 _ I 1 ^ m) d / H. ~!!
K42JA: Version No. Chipset: HM55 REV2.0 CPU power supply before: power generation timing alone was set was powered: Found CPU Block child on the ground, closed the set was not used ...
K42JA: Version No. Chipset: HM55 REV2.0 CPU power supply before: power generation timing alone was set was powered: Found CPU Block child on the ground, closed the set was not used ...
Model: ASUS A40J & ~ 9 L1 [1 ~ & I1 F + J
board number: k42ja 3 B / L: L h2 ^ Q7.
Chipset: HM55 8 C. @ / Y5 V; U1] / J
single display board Before reset: single significant power generation timing
board number: k42ja 3 B / L: L h2 ^ Q7.
Chipset: HM55 8 C. @ / Y5 V; U1] / J
single display board Before reset: single significant power generation timing
Model: ASUS k42j 5 A; D8 U6 Q7 L "v, k
plate number: k42jc "| # I9 m $ O V4 [$ Q5 P. h5 O
Chipset: HM55 , c $ L1 U 'n2 O?
set was Power generation timing: When about two seconds before the reset code to run continuously generated twice after not reading memory spd power alone was timing: this machine has been reset before I feel very strange machine that is not normal beginning but later found to be normal
Models: Lenovo Y470 HM65: chipset 4 L h | (J6 {6 n 'U & F!} 4 R,! independence was powered: before reset after reset: set display power
ACER 5742 ! - O k "\: T% W + A 'O) D7 P
plate number: LA-5894P / LA-5893P 'Y: {: M1 h (] 6 L + X / B
Chipset: HM55 alone significantly: Reset after that
"R; N% ^ 4 M5 t- Q)] * Pplate number: LA-5894P / LA-5893P 'Y: {: M1 h (] 6 L + X / B
Chipset: HM55 alone significantly: Reset after that
Machine: ACER 4750 8 [8 E; e & y * z b3 R6
plate number: JE40 Chipset: HM65 / P $ K) f # D1 J6 K8 R) B; ` alone significantly: before reset
0 p / T. g! G5 z &] 5 E "V 'm9 jplate number: JE40 Chipset: HM65 / P $ K) f # D1 J6 K8 R) B; ` alone significantly: before reset
Model: DELL N4110 plate number: V02A 6 G1 y 'X4 L) r9 ^ - i% g7 L $ V (i Chipset: HM67 independence was powered generation timing: After reset 9 F- S8 q * m + S 'V / A: | K- o & After running code: set display power generation timing
Model: dell n4110 plate number: DAV02AMB8F1 Chipset: HM67 After reset: single significant power generation timing
, Q;! N x4 M, R- Y 'd / r + ^
Acer 4752 : W2 Z @ 9, I8 f Z3 |
JE40 10267 ?) Q; H + G2 b / M)
HM65 % K * h "'U1 S4` # O # H?
After the set was Happy out!
$ U &] 5 n; W P # t: MJE40 10267 ?) Q; H + G2 b / M)
HM65 % K * h "'U1 S4` # O # H?
After the set was Happy out!
Model: LENOVO5 G470 , C7 \ B6 L T; M9 {!.
Plate number: LA-6751P Chipset: HM65 ^ 8 \ 4 B) e + `&` N!! independence was powered generation timing: before resetting CPU voltage ago 8 {6 X5 q | c7 X 'l7 {' Y;; X! After running code: set display power generation timing
! P- J: H5 T% l "q3 x; K $ X0 DPlate number: LA-6751P Chipset: HM65 ^ 8 \ 4 B) e + `&` N!! independence was powered generation timing: before resetting CPU voltage ago 8 {6 X5 q | c7 X 'l7 {' Y;; X! After running code: set display power generation timing
Models: HP dv6 X1 A 3% N6 V / S0 [/ J
board number: lx6 / LX7 chipset: HM5x "Q0 _ * F $ C & K1 z $ f; P single set of display board set was powered generation timing: CPU Before power
board number: lx6 / LX7 chipset: HM5x "Q0 _ * F $ C & K1 z $ f; P single set of display board set was powered generation timing: CPU Before power
Models: Lenovo U460 board number: LA-5941p Rev: 1.0 Chipset: HM55 3 C * U / V, ~ 3 m single significant power generation timing: before reset
Lenovo V460 - A0 O # k; h * @ 0 q
Wistron LA46 09922 Chipset: HM55 5 O & E4 {# C4 L F + @% H r alone was produced before the reset
3 C # n% C; w%] 6 M4 cWistron LA46 09922 Chipset: HM55 5 O & E4 {# C4 L F + @% H r alone was produced before the reset
Models: Lenovo E47 $ a9 `) i M7 P, O V!
plate number: KL9A # [7 Q) @ - F2 M0 ^ # X R
Chipset: HM65 separate display board 5 G $ y + L O &? 9 H before the reset: single significant power generation timing
! - A b7 F3 @; V% O E4 Oplate number: KL9A # [7 Q) @ - F2 M0 ^ # X R
Chipset: HM65 separate display board 5 G $ y + L O &? 9 H before the reset: single significant power generation timing
Models: Lenovo E47 plate number: KL9 Chipset: HM65 single set of display board after the reset: set display power generation timing
Models: Lenovo Z480 L0 D + 1 S8 U2 b 'G0 G
plate number: LZ2A 'r /} 1 S9 Q # x L) x.
Chipset: HM76 5 z (C G5 m $ ~) a B8 U6 T!. # F
dual graphics card set was powered generation timing: After a reset before the reset: single significant power generation timing
plate number: LZ2A 'r /} 1 S9 Q # x L) x.
Chipset: HM76 5 z (C G5 m $ ~) a B8 U6 T!. # F
dual graphics card set was powered generation timing: After a reset before the reset: single significant power generation timing
Models: Lenovo E46 plate number: LL5 # _ '3 [, k} / 9 R1 T3 {?.? Chipset: HM55 single display board set before the reset: set display power generation timing
Aircraft: ASUS K43E plate number: K43SD Chipset: HM65 single display board set to run code after the CPU: the set was powered generation timing
Aircraft: Tongfang Fengrui k485 K465 * & I0 _ `/ S4 _; _ / {* Y]
plate number: H09_VD independence was powered generation timing: After a reset before the reset was also said to be confirmed powered generating set was timing: After running code
9 K4 t7 W1 c1 l) m * e% ~plate number: H09_VD independence was powered generation timing: After a reset before the reset was also said to be confirmed powered generating set was timing: After running code
ACER 4750 plate number: JE40 % f1 g:] $ `0 H;] 3 @ 8 D? chip HM65 ) E8 C%] i $ Q7 T: W. independence was before the reset set was when running code generation
Aircraft: Founder R410 & L0 S2 D1 q & U. z
plate number: DAOZQ9MB6C0 REV: C $ O & [0 U8 R2 g # q, R9 d 'z
Chipset: HM55 9 ^ 6 s7 C2 V7 F2 R7 E
alone was power generation Before Reset: Timing
2 S B: O6 G v, y # r2 Q: X4 Jplate number: DAOZQ9MB6C0 REV: C $ O & [0 U8 R2 g # q, R9 d 'z
Chipset: HM55 9 ^ 6 s7 C2 V7 F2 R7 E
alone was power generation Before Reset: Timing
Acer 4750G JE40 10267 "x, V3 [U) P \ 4 J!! HM65 graphics card: Before resetting ! 8 O 'A P% R & H HP G6 version number Quanta R13 Chipset H65 ~ 3 P "L: Y7 L + q L set was powered: After running the code ! 3 G S j-] 7 m7 n% z, f / { independent power supply: Before you reset (voltage did not come out before the set was already out)
Machine: ACER 5742 plate number: LA-5894P / LA-5893P ! w S (^ $ i "?) i) T Chipset: HM55 After reset: alone significantly
& R0 h "B & K7 f * K4 l) x & \) e- m; g / B 't
Models: Lenovo Z470 3 L% Q $ W%] 7 e) @ 1 i & M
version number: KL6A 8 ~ 8 s, C5 R $ L1 U4 r
Chipset: HM65 # P6 k & i5 E8 C * S. Y
Graphics : set was reset after power is
version number: KL6A 8 ~ 8 s, C5 R $ L1 U4 r
Chipset: HM65 # P6 k & i5 E8 C * S. Y
Graphics : set was reset after power is
Aircraft: Fujitsu LH532 3 p3 \ 0 i X / y (V | $ E Y8 X2 U1 [.!
plate number: FJ8 Chipset: HM76 set was powered generation timing: After running code
# X- @ $ W3 @ 2] 0 L7 Z4 \, Nplate number: FJ8 Chipset: HM76 set was powered generation timing: After running code
ASUS N55S plate number N55SF REV: 2.0 k% X / L * K9 S0 G5 q:% W power alone was reset before the set was after power, run it
Model: ThinkPad E530 !. L O2 r & @% k K * ~ 2 L L) e + t
plate number: la-8133p (T1 ~ * _0 W # E7 L {4 P.
Chipset: hm6X $ K% K (g: T $ y1 J + D
alone was powered: before reset after running code: set display power
plate number: la-8133p (T1 ~ * _0 W # E7 L {4 P.
Chipset: hm6X $ K% K (g: T $ y1 J + D
alone was powered: before reset after running code: set display power
A few days ago to repair a machine, no set was powered. Check the conditions are met, said after the forum to see a note in the new machines are run code after the set was powered brush after a bios, solve the problem!
9 H7 y2 q: k u- j7 N.
Tsinghua Tongfang K41H 10259-1; plate number & I5 [9 ~, s-} 6 X single voltmeter; before the reset voltage was set: after a reset
: Models hp Pavilion g4 Quanta R12 | 3 q / T% b4 B, v8 Intel HM55: chipset After reset: single significant power generation timing
Model: Y460 \ # E3 p8 N1! {% 9 F7 `I
plate number: KL2 Chipset: 55 $}. h Y # R7 u & G. V power supply alone was in the running yards out, why, I do not install Memory is not the only significant voltage own verified. Because a few days ago to repair a few days ago to repair a piece of the three dozen
plate number: KL2 Chipset: 55 $}. h Y # R7 u & G. V power supply alone was in the running yards out, why, I do not install Memory is not the only significant voltage own verified. Because a few days ago to repair a few days ago to repair a piece of the three dozen
Fujitsu LH531 ?!% \ 7 O9 V7 @ 8 Q * A
board number: 6050A2419601 $ T d Z1 T (e u $ H "~ 0 x!..
Chipset: HM65 independence was powered: not before into the system, when 3DMARK power alone was to come out when you run after run code: set display power
board number: 6050A2419601 $ T d Z1 T (e u $ H "~ 0 x!..
Chipset: HM65 independence was powered: not before into the system, when 3DMARK power alone was to come out when you run after run code: set display power
Model: LENOVO G470 Version Number: LA-6751P Chipset: HM65 integrated graphics: After running the code, detected after the memory discrete graphics: Before Reset Generation
6 L ^ 3 ^ (s + W (| (c # O "I 'w
Models: Lenovo Z485 plate number: DALZ2CMB8E1 Chipset: 218-0755097 FCH APU reset before: set was powered "H7 Q # M $ a: Z a z. After APU reset: single significant power
This machine into the water, and three inductance alone was no electricity, and later found APU_RST # pullup resistor R2029 do not know how crooked, after righting, machine light, alone was there when powering up. Do not install memory, the current has been repeatedly jump, independence was inductive voltage are repeatedly jump.
? 1 h / 3 n1 K: r4 q & x
Lenovo Y470 LA-6881P high after SYS_PWROK 3.3V, pulled it, the fan stops 5 @ 8 X0 A: H3 i alone significantly + VGA_CORE 0.83 V 2 E * L $ R3 z # V 'i set was no voltage + VGFX_CORE 0V 0 z ([; J "U5 C. L * J CPU + 1.2V CPU_CORE J4 r0 U. Y / _ A0} i, O!!. "Z Description: The power supply before independence was reset, the set was power is reset
9 D / a + z) {6 I3 U
Model: DELL15.6 the cottage, no model (ASUS had the same plate number cottage) plate number: DAOTWCMB8D0 REV D(L8 `- _ / m8 r Chipset: HM76 (SLJ8E) : V & D + X / i2 [, R & Y " O # J before the reset: power alone was set was powered: Happy over a memory -
Model: Asus X45V plate number: X45VD REV.3.0 Chipset: SLJ8E independence was powered: before resetting % \ (v 'Z * M:} & r) N; w set was powered: Happy too after memory
Model: B470e plate number: 10250 chipset: HM6X 9 3 D3 @ p3 X & J "m before the reset: power alone was timing
Model: Tinkpad t410 & q (v Z1 I0 g \ u _ + {6 E.
Plate Number: 09A33-3 48.4FZ16.031 chipset: qm57 dual graphics card set was powered generation timing: After reset 6 K3 [1 f6 ~ k; | before the reset: single significant power generation timing
0 L- y0 U) i + q # d- U: I4 n6 k * KPlate Number: 09A33-3 48.4FZ16.031 chipset: qm57 dual graphics card set was powered generation timing: After reset 6 K3 [1 f6 ~ k; | before the reset: single significant power generation timing
Models: Lenovo E430 8 Y6 v8 |) `K; D1 F; c8 F. L!
plate number: LA-8118P Chipset: HM65 ; f7 U. B * u $ K $ K1 P + y single set of display board set was After reset: power generation timing
# U (m8 h # W / L% v1 Vplate number: LA-8118P Chipset: HM65 ; f7 U. B * u $ K $ K1 P + y single set of display board set was After reset: power generation timing
Model: IBM t430s version number: LSN-4 uma MB 11263-1 chipsets: bd82qm77 integrated graphics only 1.04v voltage detection to the system
9 g0 @ $ e: M & S + H C1 C
Y460P 6} V & ~ 0 U2 \) v N, C; q (S & b.!
dakl2fmb8e0 Rev: e ; K _: K:} Y9 L
hm65 !! 7 S2 U1 f g * C (_ i
reset before + C7 Q3 w (L: \ * H) N
cpu power supply short circuit no other all-out
. $ D9} M8 z; O5 O1} 5 `- R1 G / xdakl2fmb8e0 Rev: e ; K _: K:} Y9 L
hm65 !! 7 S2 U1 f g * C (_ i
reset before + C7 Q3 w (L: \ * H) N
cpu power supply short circuit no other all-out
DELL N5110 (HM67) DQ15 N15 10260 . P / Y2 R 'F5 t9} + {M # K L5 1 X CPU power before independence was set was powered yard run after
) U: | 4 b / @ (d6 [) {1 m L1 T
Machine: DELL N5110 % h y $ [9 M / f # O3 J2 g
plate number: DQ15 10260-1.48.4IE07.011 Chipset: HM65 alone significantly: after a reset
; G- S (k $ J '[; Gplate number: DQ15 10260-1.48.4IE07.011 Chipset: HM65 alone significantly: after a reset
Model: HPDV6 2 \ R6 u:. W8 t% O
plate number: 11253-1 (F & X4 O9 _3 d (y $ ['`
Chipset: HM77 after Happy: single significant power generation timing
? 3 U0: X; o wplate number: 11253-1 (F & X4 O9 _3 d (y $ ['`
Chipset: HM77 after Happy: single significant power generation timing
Lenovo G480 ! y (W4 N: \ 7} & U
board number LA-7981P - C% Q4 M.} # t * i _ s} 5 "x
chipset SLJ8E B.) gt $] i # K0 F "U O9 _, K; k:
reset after the set was
before independence was reset
board number LA-7981P - C% Q4 M.} # t * i _ s} 5 "x
chipset SLJ8E B.) gt $] i # K0 F "U O9 _, K; k:
reset after the set was
before independence was reset